Cache Coherency Counters
- The directory cache coherency protocol sends signals to nodes that requested data from memory in the past
- Invalidations are transactions that convert cache lines from the “shared” to invalid state
- Interventions are transactions that convert cache line from the exclusive to “shared” or “invalid” (depending on whether the requestor asked for “shared” or “exclusive” access)
- Counters 12 and 13 tell how many interventions and invalidations have been received by the processor; counters 28 and 29 tell how many of them actually hit in the cache
- Invalidations and/or interventions are sent to a node because the cache line owner thinks that node has the cache line. However, if that processor has dropped the cache line earlier, the signal will not find the data in the cache and counters 12 or 13 will be updated, while 28 or 29 will not.